JPH0370385B2 - - Google Patents
Info
- Publication number
- JPH0370385B2 JPH0370385B2 JP9376381A JP9376381A JPH0370385B2 JP H0370385 B2 JPH0370385 B2 JP H0370385B2 JP 9376381 A JP9376381 A JP 9376381A JP 9376381 A JP9376381 A JP 9376381A JP H0370385 B2 JPH0370385 B2 JP H0370385B2
- Authority
- JP
- Japan
- Prior art keywords
- film
- etching
- region
- oxide film
- semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
- H01L21/76237—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials introducing impurities in trench side or bottom walls, e.g. for forming channel stoppers or alter isolation behavior
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Element Separation (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9376381A JPS57210671A (en) | 1981-06-19 | 1981-06-19 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9376381A JPS57210671A (en) | 1981-06-19 | 1981-06-19 | Manufacture of semiconductor device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS57210671A JPS57210671A (en) | 1982-12-24 |
JPH0370385B2 true JPH0370385B2 (en]) | 1991-11-07 |
Family
ID=14091464
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP9376381A Granted JPS57210671A (en) | 1981-06-19 | 1981-06-19 | Manufacture of semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57210671A (en]) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS59178773A (ja) * | 1983-03-30 | 1984-10-11 | Toshiba Corp | 半導体装置の製造方法 |
-
1981
- 1981-06-19 JP JP9376381A patent/JPS57210671A/ja active Granted
Also Published As
Publication number | Publication date |
---|---|
JPS57210671A (en) | 1982-12-24 |
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